The RISC-V Summit North America, held on 22-23 October 2025 in Santa Clara, California, showcased the latest CPU cores featuring new vector processors, high-speed interfaces, and peripheral subsystems ...

SANTA CLARA, Calif.--(BUSINESS WIRE)--SiFive, Inc., the gold standard for RISC-V computing, today announced that the company has partnered with Kinara to create a USB-based enablement board that ...

Hsinchu, Taiwan, Oct. 21, 2024 (GLOBE NEWSWIRE) -- Andes Technology, a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and Founding Premier member of RISC-V ...

Ventana Micro Systems as announced the introduction of its latest marvel in the Veyron lineup—the Veyron V2. Marketed as the highest performance RISC-V processor to date, it’s clear that Ventana has ...

TAIPEI, Taiwan & HAIFA, Israel--(BUSINESS WIRE)--Andes Technology Corporation (TWSE: 6533), a leading supplier of RISC-V processor IP, and proteanTecs, a global leader of health and performance ...

Most chips today are built from a combination of customized logic blocks that deliver some special sauce, and off-the-shelf blocks for commonplace technologies such as I/O, memory controllers, etc.

A new technical paper titled “Towards a Base-Station-on-Chip: RISC-V Hardware Acceleration for wireless communication” was published by researchers at TU Dresden and Centre for Tactile Internet with ...

We had reached out to NEC for comment and had not heard back as yet when this story ran, but we have added the comment to the bottom of this story. The only reason we bring this up at all is that ...