IEEE

Design and Implementation of an Efficient Quantum Cost Optimized Adder Using Reversible Logic Gates

Abstract: In modern Very-Large-Scale Integration (VLSI) technology, managing information loss is a critical challenge. Conventional logic gates, such as AND, OR, and NOT, are prone to data loss during ...
IEEE

Design and Implementation of Full Adder using 4 to 1 line Multiplexer Based on Nonlinear Switching Micro Ring Resonator Structure

Abstract: This paper intended to assert the designing of the four to one line multiplexer logic using nonlinear switching techniques based on Micro Ring Resonator (MRR) structure for the proposed full ...